CMOS芯片
存水弯(水管)
材料科学
戒指(化学)
光电子学
离子
离子注入
电气工程
电子工程
工程类
物理
化学
有机化学
量子力学
环境工程
作者
Peng Zhao,Yu Dian Lim,Hongyu Li,Jean-Pierre Likforman,Luca Guidoni,L. Desormeaux,Chuan Seng Tan
标识
DOI:10.1109/iedm45741.2023.10413875
摘要
We present the design, fabrication, and test of ring surface trap on 12-inch wafers with a CMOS process. The design is based on Through Silicon Vias (TSV) interconnects. Up to 200 ions were loaded and cooled; preliminary compensations of electrostatic potential imperfections show that rotational symmetry can be partially restored.
科研通智能强力驱动
Strongly Powered by AbleSci AI