A Novel Design of 28 nm Latch Type Sense Amplifier for Differential Voltage Enhancement

As IoT is getting a thriving development, IC technology has stepped into the nano-meter era. For advanced 28 nm process and beyond, the device pitch becomes smaller. As a result, the coupling effect increases rapidly, degrading the performance of the critical design block, such as sense amplifiers in SRAM design. In addition, the process variation needs to be carefully addressed. In this paper we introduce an improvement over traditional latch type sense amplifier. The modification employs additional coupling effect in order to cancel out the device coupling observed in original design. The improved design shows a significant yield improvement based on the Monte-Carlo simulations under various operating conditions. The layout pattern modification is also presented, demonstrating an alternative sense amplifier implementation to address the coupling effect at negligible power and area overhead.