Effects of Interface Traps on Ferroelectric Field-Effect Transistors with Random Crystal Phase Fluctuations

HfO 2 -based ferroelectric field-effect transistors (FeFETs) are significantly affected by traps at the ferroelectric/interlayer (FE/IL) interface, as these traps capture electrons and holes. In this study, the effect of interface traps at the FE/IL interface on the memory window (MW) and threshold voltage ([Formula: see text]) of FeFETs is investigated under different trap distributions. The results of this study show that interface traps, whether uniform or random, cause the [Formula: see text] to shift to the right. The MW increases as the [Formula: see text] is shifted, and thus the interface traps at the FE/IL interface can enhance ferroelectric polarization. In the case of a random distribution of interface traps, as the density of interface traps ([Formula: see text]) increases from [Formula: see text] [Formula: see text]cm[Formula: see text] to [Formula: see text] [Formula: see text]cm[Formula: see text], the mean value of the memory window ([Formula: see text]MW) is from 0.68[Formula: see text]V to 0.76[Formula: see text]V, and the standard deviation of the MW ([Formula: see text]MW) is from 10.2[Formula: see text]mV to 10.0[Formula: see text]mV. In the presence of a random distribution of ferroelectric/dielectric (FE/DE) phases, the interface traps result in a more discrete MW distribution. Furthermore, a thin IL layer and high FE phase percentage increase the MW.