Design and implementation of memristive neuron leakage integrator, and learning feedback

In this paper we present results of the simulation and physical implementation of eSTDP and iSTDP learning functions for memristive devices, bio-plausible neurons, and soma leakage integrator. The implementation of the STDP is implemented as memristive neuron schematic with excitatory, and inhibitory inputs. Wiring schematic for all cases as well as the simulatory experiments results are implemented in LTSpice simulator. The physical implementation is done via analog op-amps resistors and capacitors.