摘要
Cadmium Selenide (CdSe) is potentially an important top layer material for making tandem junction solar cells using crystalline Silicon as the bottom layer. It is a II-VI group inorganic semiconductor with desirable moisture and thermal stability properties. It is an n-type direct bandgap material with high absorption coefficient in the visible region. As a result, only a thin film of CdSe is needed to absorb majority of the solar spectrum; and this thin film of polycrystalline CdSe can be easily deposited using mass-production vapor deposition techniques reducing the fabrication cost. However, the polycrystalline nature gives rise to grain boundaries which, lead to current killing grain boundary recombination. To improve the device performance, it is of the utmost importance to identify these fundamental loss mechanisms. In the first part of this work, we report on depositing thin films of CdSe using simple thermal evaporation method and the optical, structural, and surface morphological properties of the deposited films were studied. The deposited films were verified to be polycrystalline in nature with a hexagonal Wurtzite structure. The optical bandgap was found to be 1.72 eV, making it an ideal top cell candidate for a tandem structure with crystalline Silicon as the bottom cell. However, the as-deposited films only had grains of 300 nm, as a result, grain boundary recombination was a true concern for performance loss. Different post-deposition treatments, such as, Cadmium Chloride (CdCl2) treatment, post-deposition Selenization, and CdSe deposition under excess Selenium flux were explored. Among them, CdCl2 treatment gave the best results; it not only enhances the grain size by a factor of 5, but also smoothened the surface, recrystallized the grains and improved the stoichiometry of the film. Additionally, electrical properties, such as, majority carrier mobility were also improved, leading us to believe CdCl2 treatment is a critical step to build a high efficiency CdSe solar cell. In the second part of this work, we have discussed the design, fabrication, and optimization of CdSe based solar cells. A p-i-n heterojunction structure was used to improve current collection where CdSe was the intrinsic, i-layer. Even though CdSe was not intentionally doped, it was found to be n-type. It is important to choose the correct n and p heterojunction with minimum conduction and valence band mismatch to get the best open circuit voltage and efficiency out of the device. After a significant amount of optimization, CdS was found to be the best candidate for the n-heterojunction. Current-voltage, Quantum efficiency and sub-bandgap quantum efficiency measurements were used to optimize the CdCl2 anneal parameter of the active i-layer. The best films were grown at a 400 ⁰C substrate temperature and were annealed at 500 ⁰C for 24 hours in the presence of CdCl2. A significant portion of the work was devoted to finding the best material for p-heterojunction. Organic material P3HT was used as the p-heterojunction in a superstrate structure. This device structure resulted in the world record open circuit voltage of 0.82 V from a polycrystalline CdSe based solar cell. However, superstrate structures typically exhibited poor current collection. Once we switched to a substrate structure with organic PEDOT as the p-heterojunction, we were able to obtain 0.55 V of open circuit voltage and 11 mA/cm2 of short circuit current density which is very close to the theoretical maxima of 18 mA/cm2. Moreover, to take advantage of the moisture and thermal stability benefits offered by CdSe, we need to use an all-inorganic device structure. Organic layers like P3HT and PEDOT degrade in the presence of moisture and heat. Different inorganic p-layers were investigated, and amorphous Silicon gave the best result. The device had an open-circuit voltage of 0.70 V and a short-circuit current density of 6 mA/cm2, proving that CdSe indeed has the potential to become a good candidate for photovoltaic operation. In the final part of this work, we worked on measuring some fundamental electronic properties of CdSe, since very little research has been conducted on this topic. Capacitance-voltage measurement was used to find a dopant density of around 2E15 cm-3 and built-in potential of 1.1 V. Capacitance-frequency-temperature measurement was used to model the trap density profile inside the forbidden energy bandgap and showed a shallow defect distribution at 0.2 eV below the conduction band and a deep defect distribution at 0.55 eV below the conduction band. This is the first ever measurement of both shallow and deep defect profile for CdSe and it gives us insight into why the open circuit voltage was so much lower than the bandgap of 1.72 eV. Dr. Bagheri, a previous member of our group was part of most of the initial work on CdSe thin film deposition and CdCl2 annealing. In this work I have followed up his research by carefully studying the annealing conditions and fundamental material properties such as shallow defects and Urbach energies, as well as optimizing the device structures which were initiated by Dr. Bagheri. As a result of this work, we now have a complete picture of how different annealing conditions lead to the best materials and devices.