An ultra-low quiescent current LDO

A low voltage low dropout regulator( LDO) is presented, which utilizes the proposed operational transconductance amplifier working in the subthreshold region to achieve ultra- low quiescent current, thus contributing to a low power consumption and a high efficiency. The proposed LDO is designed in a 0. 35 μm standard CMOS process, and the whole circuit occupies an area of 0. 8mm2, dissipating a quiescent current flow of 500 n A at typical working condition as well as delivering a largest current of 150 m A at full- load condition. The circuit is operable with the input voltage ranging from 3. 3 V to 5 V, and the output voltage is 3 V.