Advanced dual inter-bridge high-k spacer integration for performance enhancement in TreeFETs with sub-10nm channel lengths

Abstract This study presents an innovative Dual Inter-Bridge (DIB) high-k spacer integration in TreeFET, demonstrating enhanced DC and analog/RF performance for sub-10 nm channel lengths. The proposed device features a DIB TreeFET structure with dimensions of 15 nm in width (WNS) and 5 nm in thickness (TNS), along with dual Inter Bridges measuring 25 nm in height (HIB) and 5 nm in width (WIB). Simulations performed using Sentaurus TCAD reveal that the TreeFET achieves a remarkable ION/IOFF ratio of 108, an ION current in the range of 10−5 A and an IOFF current of 10−13 A. The device exhibits a subthreshold swing (SS) of 60.4 mV/decade, attributable to fringing fields in the high-k spacer and DIB design, which enhance electrostatic control and electron mobility in the channel region. A comparative analysis of various spacer materials like HfO2, Si3N4, and SiO2 at varying spacer lengths demonstrates the superiority of HfO2 due to its exceptional dielectric properties, leading to optimized electrostatic control and minimized
leakage currents. Furthermore, the study examines the impact of gate length variations on device performance, underscoring the scalability of TreeFET in compliance with Moore’s law. The findings highlight the potential of the DIB TreeFET structure as a viable solution for future high-performance, ultra-scaled devices in advanced semiconductor technologies.