单片微波集成电路
光电子学
电气工程
电流(流体)
物理
工程类
放大器
CMOS芯片
作者
Doki Venkata Vinay Kumar,Muddaser Mohiyuddin,Suman R. Valke,Senthil Kumar,N Ramalakshmi
标识
DOI:10.1109/i2ct61223.2024.10543637
摘要
This article describes design technique of Low Noise Amplifier (LNA) at C-band (5.7GHz-7.2GHz) based on self-bias with low current approach. Design carried out using GaAs based 130nm MMIC technology. Simulated results show noise figure of better than 1.22dB with a minimum gain of 27.9dB in the given frequency band. Input return loss is better than 13dB and output return loss is better than 15dB.The die operates at 5V,36.7mA. A comparison study with existing hardware and an MMIC design that uses conventional biasing approach has also been presented. 55% efficient in terms of power consumption and 50% reduction in size of the receiver front end can be achieved using this LNA. MMIC die is designed with a chip size of 2.9mm x1.8mm.
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