Developing of Wafer Level Fan-Out Packaging Technology for Millimeter-Wave Chip Using Different Carriers

With the fast development of 5G, millimeter wave (mm-Wave) chip packaging technology has broad application in automotive radar, IoT (Internet of Things) and 5G communication. Although quad flat no-lead (QFN) package is widely deployed in radio frequency (RF) and highspeed digital systems, it cannot meet the requirements of electrical performance when the frequency is up to 45 GHz. The demand for mm-Wave chip packaging with high performance, high integration density and low manufacturing cost is increasing rapidly. A number of advanced packaging technologies with fan-out structure emerged over the past years. Recently, the development of fan-out wafer level packaging (FOWLP) has been paid more attention. This paper presents a brief review of the mm-Wave chip packaging solutions which are based on wafer level fan-out packaging technologies including embedded wafer level grid ball array (eWLB), embedded silicon fan out (eSiFO), glass panel embedding (GPE) and embedded glass fan out (eGFO). Besides, the electrical performance of these packages is presented by simulation.