电源抑制比
CMOS芯片
运算放大器
共模信号
电子工程
共模抑制比
电容器
积分器
开关电容器
电气工程
放大器
计算机科学
功率(物理)
运算放大器积分器
公共门
工程类
物理
电压
数字信号处理
模拟信号
量子力学
作者
D.B. Ribner,M.A. Copeland
出处
期刊:IEEE Journal of Solid-state Circuits
[Institute of Electrical and Electronics Engineers]
日期:1984-12-01
卷期号:19 (6): 919-925
被引量:182
标识
DOI:10.1109/jssc.1984.1052246
摘要
Internally compensated CMOS op amps have been widely used in sampled-analog signal processing applications over the past several years. However, the popular two-stage op amp suffers from poor AC power supply rejection to one of the power rails. Two circuits are presented that overcome the power-supply rejection ratio (PSRR) problems of the earlier amplifier: one for virtual ground applications such as switched-capacitor integrators, the other for buffer applications requiring wide common-mode input range. Small signal analysis is developed for the open-loop and PSRR responses of the two amplifiers. In addition, design guidelines are suggested and test results are presented.
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