欧姆接触
材料科学
半导体
肖特基势垒
光电子学
异质结
晶体管
肖特基二极管
范德瓦尔斯力
制作
纳米技术
场效应晶体管
数码产品
集成电路
相(物质)
半导体器件制造
半导体器件
电子线路
电子工程
电极
接触电阻
电接点
可扩展性
可靠性(半导体)
作者
Qin Shuai,Qijun Zong,Jiali Yi,Tian Zhang,Huawei Liu,Zheng Wang,Haifeng Wu,Tanghao Xie,Dong Li,Anlian Pan
标识
DOI:10.1002/adma.202522270
摘要
ABSTRACT 2D semiconductors offer a promising platform for next‐generation integrated circuits and large‐scale electronic systems. Realizing high‐performance p‐type transistors, however, remains challenging due to Fermi‐level pinning, high contact resistance, and poorly defined interfaces in conventional stepwise fabrication. Here, we demonstrate a single‐step tellurization growth strategy that simultaneously forms PtTe 2 contacts on 2H‐MoTe 2 channels to directly realize 2D semiconductor transistors. This approach forms PtTe 2 /2H‐MoTe 2 metal/semiconductor arrays with precise control of the MoTe 2 phase at the PtTe 2 electrode interface, while providing integrated van der Waals metallic contacts without the need for post‐growth of metal contacts. Using this method, we achieve wafer‐scale heterophase arrays characterized by uniform patterning and well‐controlled 2H/1T' phase transformation dynamics. The heterojunctions display sharp and clean interfaces, as verified by TEM, STEM, and EDS mapping. Transistor arrays fabricated from these heterophase structures show Ohmic contacts with low Schottky barrier heights, delivering on/off ratios up to 5 × 10 4 and consistent mobility of 5–9 cm 2 /Vs across 100 devices, ensuring efficient carrier injection. Our results establish a scalable pathway for the direct growth of 2D semiconductor transistors, overcoming conventional multi‐step device fabrication bottlenecks and providing a promising platform for large‐scale, and reproducible 2D electronics.
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