A DOE study of plasma etched microlens shape for CMOS image sensors

CMOS optical sensors performances are mainly driven by the quantum efficiency and the pixel cross talk. Microlens arrays implementation is a way to improve both by focalizing the incident light on the active photodiode area. Further optimizations include fill factor maximization by reducing the space between microlenses. In this study we propose the fabrication of zero gap microlens arrays by plasma etch transfer of reflowed microlenses into a subjacent resist layer. The impact of lithography, reflow and etch process parameters on microlenses shape and space reduction are discussed. We show that etch time increase allows gap reduction down to zero, while polymerization control is key to conserve microlens height. The impact of 3 process factors on the final microlens shape are studied using DOE (design of experiment) methodology. Thus, microlenses gap and height evolution as a function of mask thickness, polymerizing gas flow and etch time are modeled within the experimental range of these factors. An optimum process point is then proposed to minimize the gap while keeping constant the microlens height.