An Overview of Low Power Design Implementation of A Subsystem using UPF

Power is the crucial element that needs to be considered in the SoC design. Architects will have the challenge to identify power issues early in the design flow and should come up with modular designs to reduce power consumption. Low power methodologies have become prominent in present designs and acquire a significant position. In order to reduce the power, extra circuitry gets added and thereby increasing the complexity of the design. Subsystems working under Always-On domain eventually consumes a lot of power and sometimes power gets wasted when it being in idle state. By proper power management, unoptimized usage of power can be reduced. This paper explains how to achieve this challenge through the deployment of low power techniques in a standard methodology. Many methodologies have been introduced and one such methodology is the power-intent description through Unified Power Format (UPF), a standard to describe the power-intent of a design implementation as well as verification procedures have been captured.