Achieving reliable, scalable, fault-tolerant quantum computation

Quantum computation has the potential to solve certain mathematical and physical problems faster than a classical computer. However, one of the key challenges to realizing a quantum computing device is controlling systematic errors and maintaining the coherence of the quantum state. In addition, once a scalable quantum computer is built, we must be able to fault-tolerantly communicate a quantum algorithm to the physical device. In this dissertation, we take several significant steps towards the realization of a quantum computer. We develop a framework for use with any proposed technology to map a quantum algorithm into fault-tolerant machine instructions. Within this framework, we combat errors and decoherence by introducing quantum error correction and fault tolerance into a quantum circuit. We analyze specific fault-tolerant circuitry on two general architectures, nonlocal and nearest-neighbor, to determine failure thresholds of the physical circuit components. These failure thresholds allow physicists to evaluate technology proposals. Our goal is to provide design tools, failure thresholds, and fault-tolerant constructions to combat the faultiness of quantum computation.