Effect and utilization of common source inductance in synchronous rectification

Synchronous rectification is widely used in low voltage high current applications to reduce conduction loss. Common source inductance is the inductance shared by gate driver loop and main power transfer path. Minimization of common source inductance has been accepted as a common design rule for power converters using power MOSFET. In this paper, the effects of commons source inductance for control and sync FETs are explored in detail. In contrary to traditional belief, common source inductance of sync FET could provide significant benefits. With sync FET common source inductance, minimal dead time, shoot through prevention and Cdv/dt immunity could be achieved, and significant switching loss reduction could be realized for all types of synchronous rectifications.