A 1.76 fj/Conv 1.49µW 12-Bit SAR ADC with Coarse and Fine Quantization for Implantable BCI Applications

This paper presents a 12-bit SAR ADC designed for implantable BCI applications. The proposed SAR ADC utilizes the low-power and high-precision comparators for the coarse and fine quantization respectively to achieve optimal tradeoffs between ENOB and power consumption. A hybrid coding (thermometer and binary) scheme is deployed to further save power consumption. The proposed SAR ADC works at 0.6 V, and achieves a 70.2 dB SNDR, with a power consumption of 1.49 µW. Additionally, it attains a Figure-of-Merit (FOM) of 1.76 fj/step and occupies only 0.00612 mm ² in a 40nm CMOS process.