Methodology for automated layout migration for 90nm Itanium/spl reg/2 processor design

Unlike past semiconductor manufacturing processes, nanometer technology has seen an exponential growth of complex design rules and constraints. As a result, direct optical shrink of products between process nodes is becoming less feasible. To facilitate aggressive time-to-market requirements by re-using designs under new process technology, new CAD automation tools and methodologies have been developed. This paper describes a process shifting flow of 130nm custom layout to 90nm. Design challenges at the new process will first be overviewed, followed by EDA-assisted layout migration. Finally, productivity gains together with the design qualities will be shown on the implementation of a next generation Itanium@2 server chip.