Comprehensive Fault Isolation Technologies for the Gate-All-Around Transistor and Backside Power Delivery Paradigm Shifts

Abstract Devices with backside power delivery and gate-all-around transistors constitute new challenges for probe-based fault isolation and device debug. We built a new fault isolation flow that leverages next-generation probe technologies and methods, advanced device prep techniques, and enhanced electrical diagnosis that is tailored for these new devices. The flow extends fault isolation to integrated circuits with backside power delivery and gate-all-around transistors, enabling process yield improvement in this new device manufacturing paradigm.