晶体管
绝缘体上的硅
节点(物理)
CMOS芯片
可靠性(半导体)
电气工程
电子工程
工程类
材料科学
光电子学
工程物理
硅
物理
功率(物理)
电压
结构工程
量子力学
作者
Ali Mohsen,Ahmad Harb,Nathalie Deltimple,Abraham Serhane
出处
期刊:Circuits and Systems
[Scientific Research Publishing, Inc.]
日期:2017-01-01
卷期号:08 (04): 93-110
被引量:1
标识
DOI:10.4236/cs.2017.84006
摘要
Nowadays, transistor technology is going toward the fully depleted architecture; the bulk transistors are becoming more complex in manufacturing as the transistor size is becoming smaller to achieve the high performance especially at the node 28 nm. This is the first of two papers that discuss the basic drawbacks of the bulk transistors and explain the two alternative transistors: 28 nm UTBB FD-SOI CMOS and the 22 nm Tri-Gate FinFET. The accompanying paper, Part II, focuses on the comparison between those alternatives and their physical properties, electrical properties, and reliability tests to properly set the preferences when choosing for different mobile media and consumers’ applications.
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