A novel circuit scheme and analysis for three-level feram

This paper proposes a novel circuit architecture and its operation style for three-level ferroelectric random access memory (FeRAM) which can improve storage density by 1.5 times compared to traditional ITIC FeRAM under same technology. A new reference voltage generation scheme is adopted to enhance the reliability of this proposed circuit architecture. Based on the results of simulation, the function and reliability of three-level FeRAM have been analyzed and verified.