Fatigue of ferroelectric field effect transistor: mechanisms and optimization strategies

Abstract The novel HfO 2 -based ferroelectric field effect transistor (FeFET) is considered a promising candidate for next-generation nonvolatile memory (NVM). However, a series of reliability issues caused by the fatigue effect hinder its further development. Therefore, a comprehensive understanding of the fatigue mechanisms of the device and optimization strategies is essential for its application. The fundamental mechanism of the fatigue effect is attributed to charge trapping and trap generation based on the current studies, and the underlying causes, occurrence locations and specific impacts are analyzed in this review. In particular, the asymmetric trapping/detrapping of electrons and holes, as well as the relationship between the ferroelectric (FE) polarization and charge trapping, are given particular attention. After categorizing and summarizing the current progress, we propose a series of optimization strategies derived based on the fatigue mechanisms.