Investigating the Role of Interfacial Layer for Resistive Switching in a Hybrid Dion-Jacobson Perovskite-Based Memristor

In-memory computing enables fast computing and low power consumption by overcoming major drawbacks of traditional computers built with a von Neumann architecture. In a memristor, multilevel storage and history-dependent conductivity modulation characteristics allow us to store the information and simulate the synaptic behaviors to mimic the biological brain. In this work, the role of the interfacial layers has been investigated in the suppression of the charge transfer barrier in Dion-Jacobson hybrid perovskite-based memristor devices. The insertion of the interfacial layers between active layer and electrodes (ITO/PEDOT:PSS/Active layer/PMMA/Ag) improves the ON/OFF ratio (10 3 ), data endurance (10 2 ), and retention (>6000 s) for the nonvolatile storage applications in 3-(aminomethyl) piperidinium (3AMP) organic spacer cation-based devices. The presence of the interfacial layer reduces the SET voltage to 0.33 V and energy consumption to an estimated value of ∼26 nJ. A mathematical model is presented and fitted with the experimental data to understand the formation/rupture of the conducting filament for the resistive switching mechanism. Neuromorphic properties like learning and forgetting nature of device (potentiation and depression), inhibitory postsynaptic current, spike number dependent plasticity, paired pulse facilitation index are also systematically investigated and presented. Thus, the potential to mimic human brain processes by these memristors has profound implications for artificial intelligence, robotics, and brain-machine interfaces, shaping the future of cognitive computing and AI-driven technologies.