计算机科学
管道(软件)
网络数据包
数据包处理
计算机网络
吞吐量
字节
导线
以太网
计算机体系结构
实时计算
嵌入式系统
计算机硬件
操作系统
无线
地理
大地测量学
作者
Jing Tan,Guodong Lv,Yi Ma,Guanjie Qiao
出处
期刊:Field-Programmable Technology
日期:2021-12-06
被引量:5
标识
DOI:10.1109/icfpt52863.2021.9609841
摘要
Packet classification is a fundamental problem in the network. With the rapid growth of network bandwidth, wire-speed packet classification has become a key challenge for next-generation network processors. In this paper, we propose a decision-tree-based, multi-pipeline architecture for packet classification accelerator in Data Processing Unit (DPU). Our solution is based on MBitTree, a memory-efficient decision tree algorithm for packet classification. First, we present a parallel architecture composed of multiple linear pipelines for efficiently mapping the decision tree built by MBitTree. Second, a special logic is designed to quickly traverse the decision tree, reducing the logic delay of the pipeline stage. Finally, several pipeline optimization techniques are proposed to improve the performance of the architecture. The implementation results show that our architecture can achieve more than 250 Gbps throughput for the 64-byte minimum Ethernet packets, and can store 100K rules in the on-chip memory of a single NetFPGA_SUME.
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