Recent advances in underfill technology for flip-chip, ball grid array, and chip scale package applications
作者
Lejun Wang,C.P. Wong
标识
DOI:10.1109/emap.2000.904159
摘要
With the paradigm shift of microelectronic packages to low cost, miniaturization, high performance, and high reliability, area array interconnecting technologies including flip-chip, ball grid array, and chip scale packages are becoming the mainstream technologies to package IC chips for cheaper, smaller, lighter, yet higher performance electronic devices. Underfill technology is critical to the reliability of area array technologies, and thus is very important to the electronics packaging industry. This paper gives an overview of the evolution of underfill technology, focusing on its recent advances, including new underfilling processes and the new types of underfills that are involved. These include reworkable underfills, no-flow underfills, molded underfills, and wafer-level-applied underfills. In this paper, different types of reworkable underfill formulations and the methodologies for their development are compared. Furthermore, generic concepts of the new underfilling processes, including no-flow, molding, wafer-level, and the underfills involved in each process, are introduced.