计算机科学
风险分析(工程)
系统工程
业务
工程类
摘要
Nanoimprint lithography (NIL) is a high throughput, high-resolution parallel patterning method in which a surface pattern of an imprint mask is replicated into a material by mechanical contact and 3D material displacement. This can be done by shaping a liquid followed by a curing process for hardening, by variation of the thermomechanical properties of a film by UV exposure, heating and cooling or by any other kind of shaping process using the difference in hardness of a mold and a moldable material. The local thickness contrast of the resulting thin molded film can be used as a means to pattern an underlying substrate on wafer level by standard pattern transfer methods, but also directly in applications where a bulk modified functional layer is needed. NIL possesses other important advantages over conventional photolithography and other NGL techniques since it does not require expensive projection optics, advanced illumination sources, or specialized resist materials that are central to the operation of these technologies. Therefore, it is mainly aimed towards fields in high-end photolithography that are costly and do not provide sufficient resolution at reasonable costs. Previous studies have demonstrated NIL resolution better than 10nm, making the technology suitable for the printing of several generations of critical memory levels with a single mask. In addition, resist is applied only where necessary, thereby eliminating material waste. Given that there are no complicated optics in the imprint system, the reduction in the cost of the tool, when combined with simple single level processing and zero waste leads to a cost model that is very compelling for semiconductor memory applications. The purpose of this paper is to review the performance improvements in NIL and describe how the advances can be applied to a variety of different devices and applications. In terms of NIL performance, we will show the improvements in overlay, defectivity and throughput, and introduce the key advances in methods to enhance automation and productivity. Regarding cross matched machine overlay (XMMO) between ArFi and NIL using an FPA-1200NZ2C, the average mean plus 3 sigma variations was 2.4nm and 2.2nm in x and y, respectively. The best results were on the order of 2.2nm and 2.1nm. Their impact on edge placement error is also discussed Regarding defectivity, random defects have been reduced to a level of less than 0.03 defects/cm2 over a period of five months. With respect to applications, three different examples are presented that are related to advanced semiconductor devices are discussed. Logic devices have many metal levels that can benefit from a simpler approach for damascene structures. In this work, we discuss electrical test results at half pitches down to 24nm. DRAM devices also require backend metal processes that currently employ complex cutting layers to make the dense line patterns function correctly. These layers are challenging from both a resolution and pattern placement perspective. The results of a straightforward cut approach using NIL will be discussed. Finally, the combination of NIL and directed self-assembly is introduced as a means for reducing linewidth roughness to ~ 1nm.
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