库达
计算机体系结构
并行计算
硬件加速
图形处理单元的通用计算
计算科学
现场可编程门阵列
作者
Yibo Lin,Shounak Dhar,Wuxi Li,Haoxing Mark Ren,Brucek Khailany,David Zhigang Pan
出处
期刊:Proceedings
[Association for Computing Machinery]
日期:2019-05-23
卷期号:: 1-6
被引量:157
标识
DOI:10.1145/3316781.3317803
摘要
Placement for very-large-scale integrated (VLSI) circuits is one of the most important steps for design closure. This paper proposes a novel GPU-accelerated placement framework DREAMPlace, by casting the analytical placement problem equivalently to training a neural network. Implemented on top of a widely-adopted deep learning toolkit PyTorch, with customized key kernels for wirelength and density computations, DREAMPlace can achieve over 30× speedup in global placement without quality degradation compared to the state-of-the-art multi-threaded placer RePlAce. We believe this work shall open up new directions for revisiting classical EDA problems with advancement in AI hardware and software.
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