互连
材料科学
苯并环丁烯
退火(玻璃)
电介质
聚酰亚胺
三维集成电路
引线键合
光电子学
通过硅通孔
硅
集成电路
炸薯条
电子工程
复合材料
计算机科学
图层(电子)
电信
工程类
作者
Yu-Min Lin,Po-Chih Chang,Ou-Hsiang Lee,Wei-Lan Chiu,Tao‐Chih Chang,Hsiang-Hung Chang,Chia‐Hsin Lee,Baron Huang,Mei Dong,Duo Tsai,Chang‐Chun Lee,Kuan‐Neng Chen
出处
期刊:
日期:2022-05-01
卷期号:: 2128-2134
被引量:15
标识
DOI:10.1109/ectc51906.2022.00336
摘要
The heterogeneous integrated package structure and process development for multi-chip and high-density interconnection structures have become a hot topic due to their ability to obtain high performance and high bandwidth density. To meet the different requirements of various heterogeneous chips, a new chip stacking technology is needed to simplify and reduce the packaging structure. Hybrid bond interconnection is one of the key technologies for achieving this kind of chiplet integration. The current hybrid bond is also called bumpless interconnection. Its interface includes copper metal pads and SiO 2 dielectric material without Cu pillar bumps and underfills encapsulation. Bonding surface requirements include excellent flatness and ultralow roughness to obtain ultrafine pitch Cu pads under 10 Pm. However, thermal annealing of the bonding interface to allow Cu/Cu surface interdiffusion still requires temperatures above 350 °C. This thermal requirement results in some chips losing their device characteristics when processed at elevated temperatures. Therefore, metal pads and dielectric materials require some research to attain a lower bonding or annealing temperature. Polymeric materials have the potential to be a low-temperature bonding dielectric layer, such as benzocyclobutene, non-conductive films, and polyimide. In our study, a novel photo-imageable dielectric is applied in the test vehicle and SiO 2 /polymer bonding interface and is used to evaluate bond feasibility with a lower-temperature bonding process. Finally, bonding can be done at room temp. After annealing at 200 ºC for 1 hour, the bonding strength of the material can be improved significantly.
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