CMOS芯片
放大器
匹配(统计)
功率增加效率
功率(物理)
电气工程
材料科学
光电子学
电子工程
物理
射频功率放大器
工程类
数学
量子力学
统计
作者
Gunwoo Park,Seungwon Park,Sanggeun Jeon
出处
期刊:IEEE Transactions on Circuits and Systems Ii-express Briefs
[Institute of Electrical and Electronics Engineers]
日期:2023-10-24
卷期号:71 (3): 1032-1036
被引量:5
标识
DOI:10.1109/tcsii.2023.3327251
摘要
This brief presents an E-band high-efficiency power amplifier (PA) implemented in a 28-nm bulk CMOS technology. The output matching network (OMN) is optimized for high power and high efficiency through a co-optimization technique where the optimum load admittance (Yopt) is derived by incorporating the loss of the OMN with the active device performance. In the mm-wave band, a transformer with a single turn ratio is widely used for OMN but poses a limitation on the maximum achievable conductance (Gout.max) to be seen by the output transistor. Therefore, a shunt capacitor (CL) is employed in this brief to boost ${\mathrm{ G}}_{\mathrm{ out.max}}$ up to the value required for reaching Yopt. Finally, the transformer dimension and ${\mathrm{ C}}_{\mathrm{ L}}$ are optimized for high efficiency and power through the co-optimization technique. The measurement shows that the PA exhibits more than 13.4 dBm of saturated power from 65 to 80 GHz. A peak power-added efficiency (PAE) of 27% is achieved at 71 GHz, which is the highest PAE among the reported E-band CMOS PAs to the best of authors' knowledge. The PAE is maintained higher than 20% from 65 to 75 GHz. The PA exhibits a rms EVM of −25.8 dB, average PAE of 8.7%, and average output power of 5.8 dBm with a 3-Gbps 64-QAM signal.
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