神经形态工程学
仿真
记忆电阻器
计算机科学
冯·诺依曼建筑
逻辑门
人工神经网络
非线性系统
突触重量
电子工程
材料科学
电压
电导
计算机体系结构
电阻随机存取存储器
节点(物理)
和大门
计算机硬件
钥匙(锁)
CMOS芯片
计算机数据存储
嵌入式系统
拓扑(电路)
干扰(通信)
频道(广播)
模块化设计
可重组计算
计算机工程
晶体管
堆积
可编程逻辑器件
炸薯条
数字光处理
作者
Decheng Wang,Zihuan Jiao,Bo Liu
标识
DOI:10.1021/acsami.5c25387
摘要
The explosive growth of computational data poses significant challenges to conventional von Neumann architectures and network processing capabilities. Two-dimensional floating gate memristors, with their compact footprint, high storage density, prolonged data retention, and rapid programming speeds, are emerging as ideal candidates for neuromorphic computing systems that integrate memory and computation. However, achieving full hardware implementation of deep neural networks necessitates the emulation of nonlinear activation functions. Here, we present a reconfigurable floating gate memristor (FGM) based on a MoS2/hBN/graphene heterostructure. The device demonstrates exceptional performance, including no significant changes in conductive states over a 3600 s test period and 66 linearly tunable conductance states, alongside multilevel conductance tunability under optical pulses. Distinct from traditional research focused solely on synaptic weight updates, we demonstrate an innovative reconfigurable "dual-function hardware unit." By strictly controlling back gate voltages below the threshold voltage (Vth), we successfully emulate both rectified linear unit (ReLU) and leaky rectified linear unit (Leaky ReLU) behaviors in floating gate and half-floating gate devices, respectively. Integrated into LeNet and AlexNet architectures, the FGM-enabled systems achieve markedly higher inference accuracy compared to activation-free models in classification tasks on the FashionMNIST and 43-class traffic sign data sets. This device simultaneously functions as a tunable synaptic weight and a native nonlinear activation function, thereby opening up the possibility of fully hardware-implemented neuromorphic systems.
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