Process-Dependent Evolution of Channel Stress and Stress-Induced Mobility Gain in FinFET, Normal GAAFET, and Si/SiGe Hybrid Channel GAAFET

This study investigates the evolution of stress and its induced carrier mobility gain in FinFET, GAAFET, and Si/SiGe hybrid channel GAAFET throughout the process flow using technology computer-aided design (TCAD) tool, which has been calibrated with experimental data from the transmission electron microscopy (TEM) and nano-beam precession electron diffraction (PED) techniques. The stress evolution indicates that Fin recess, S/D epi growth and Gate removal are three crucial process steps that influence channel stress. For nFETs, FinFET achieves a mobility gain from channel stress of approximately 0.8%, whereas GAAFET exhibits a mobility gain of 7.5%, representing nearly a tenfold increase, mainly due to the differences in process flow starting from multi epitaxial layers. For pFETs, GAAFET achieves a 20% and 60% improvement in stress and stress-induced hole mobility gain compared to FinFET. Furthermore, Si/Si0.7Ge0.3 hybrid channel GAAFET shows a further improvement of 100% and 65% on stress level, and an improvement of 231% and 105% on hole mobility gain over FinFET and GAAFET, respectively. Moreover, it implies that the higher stress-induced mobility gain in p-type than n-type GAAFET is expected to mitigate the mobility imbalance between holes and electrons caused by the change of dominant surface orientation from {110} in FinFET to {001} in GAAFET. This work gives a comprehensive picture of the process-dependent evolution of channel stress and its mobility gain in different advanced device structures, and offers new insights into the mobility balance in GAAFET from the perspective of stress.