Empirical noise performance of prototype active pixel arrays employing polycrystalline silicon thin‐film transistors

Purpose In the spirit of overcoming the signal‐to‐noise limitations of active matrix, flat‐panel imagers (AMFPIs) which employ array circuits based on a‐Si:H thin‐film transistors (TFTs), an empirical investigation of the noise properties of prototype active pixel arrays based on polycrystalline silicon (poly‐Si) TFTs is reported. Like a‐Si:H, poly‐Si supports fabrication of large area, monolithic x‐ray imaging arrays and offers good radiation damage resistance, while providing electron and hole mobility orders of magnitude higher. Compared to pixel circuits typically consisting of a single addressing switch in an AMFPI array, the pixel circuit of an active pixel array includes an amplifier that magnifies the imaging signal prior to readout by external acquisition electronics. Also, while readout erases signal stored in the pixels for AMFPI arrays, active pixel arrays allow multiple nondestructive readout, which can be used to reduce noise. The prototype arrays investigated in this paper were developed to explore the effect of variation in amplifier design on noise. Methods A pair of prototype arrays incorporating single‐stage and two‐stage poly‐Si pixel amplifiers were examined. The arrays incorporate various amplifier designs in which dimensions of some of the three (or four) poly‐Si TFTs per pixel circuit for the single‐stage array, and some of the five poly‐Si TFTs for the two‐stage array, were varied. The arrays were operated using a recently developed electronic data acquisition system that allows variation of operational conditions such as voltages and timing of control signals. The arrays were operated in the absence of radiation in various correlated multiple sampling modes, with and without the injection of charge directly into the pixel circuits for measurements of in‐pixel gain and pixel noise. Pixel noise, referred back to the input of the pixel amplifier, was compared to predictions generated by a sophisticated circuit simulation model. Results Across the various pixel circuit designs, the median in‐pixel gain for the single‐stage and two‐stage arrays was measured to be ×9.3 and ×25, respectively. These gain levels were sufficient to reduce the contribution of external noise, defined as the electronic additive noise in the absence of noise contributions from circuitry in the pixel and referred back to the input of the pixel amplifier, to less than 340 e. As a result, median pixel noise results as low as ~695 e and 866 e, acquired using eight samples, were observed from the best‐performing single‐stage and two‐stage designs, respectively. While the magnitude of pixel noise predicted by simulation was lower than the measured results, there was generally good agreement between simulation and measurement for the functional dependence of noise on operating voltages, timing, and sampling mode. Conclusions The single‐stage and two‐stage arrays examined in this study demonstrated pixel noise well below that typically demonstrated by AMFPIs. Through proper design, it should be possible to maintain the noise levels observed in this study irrespective of the size and pitch of an active pixel array. Further reduction in pixel noise may be possible through more optimized pixel circuit design, faster readout, or improvements in fabrication.