纳米片
CMOS芯片
晶体管
计算机科学
拓扑(电路)
物理
电气工程
材料科学
光电子学
纳米技术
电压
工程类
作者
Jingyun Zhang,Takashi Ando,Chun Wing Yeung,Miaomiao Wang,Ohseong Kwon,Rohit Galatage,Robin Chao,N. Loubet,Bum Ki Moon,Ruqiang Bao,Reinaldo A. Vega,Jun‐Tao Li,Chen Zhang,Zuoguang Liu,Myunggil Kang,Xin Miao,Junli Wang,Sivananda Kanakasabapathy,Veeraraghavan Basker,Hemanth Jagannathan
出处
期刊:
日期:2017-12-01
卷期号:: 22.1.1-22.1.4
被引量:59
标识
DOI:10.1109/iedm.2017.8268438
摘要
In this paper, we report multi-threshold-voltage (multi-Vt) options for stacked Nanosheet gate-all-around (GAA) transistors. V t can be modulated through workfunction metal (WFM) thickness as well as the inter-nanosheet spacing (T sus ), the combination of which may be leveraged to increase the number of undoped V t offerings within a CMOS device menu relative to a FinFET CMOS device menu, which fundamentally does not have T sus as a V t tuning option. Hence we propose our multi-V t scheme by taking advantage of the unique structure of stacked GAA transistor.
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