化学机械平面化
互连
铜互连
过程集成
节点(物理)
可靠性(半导体)
材料科学
退火(玻璃)
工艺优化
铜
生产线后端
过程(计算)
计算机科学
纳米技术
工程类
工艺工程
功率(物理)
图层(电子)
计算机网络
冶金
物理
结构工程
量子力学
环境工程
操作系统
作者
Gaurav Thareja,Ashish Pal,Xingye Wang,S. Dağ,Shi You,Shashank Sharma,Qing Zhu,Carmen Leal Cervantes,Shinjae Hwang,Matthew Spuller,Ben Ng,P. Sathish Kumar,Norman Tam,Max Gage,Sameer Deshpande,Zhiyuan Wu,Alexander Jansen,Liton Dey,Feng Chen,Xian-Jin Xie
标识
DOI:10.23919/vlsitechnologyandcir57934.2023.10185299
摘要
We present novel back-end-of-line (BEOL) copper interconnect integration for advanced technology nodes using integrated selective barrier copper barrier seed (CuBS) process, annealing and chemical mechanical planarization (CMP). Electrical tests (resistance, reliability) combined with Materials-to-Systems Co-Optimization (MSCO™) simulations confirm significant power-performance-area (PPA) gains for 3nm technology node and beyond.
科研通智能强力驱动
Strongly Powered by AbleSci AI