材料科学
高分辨率透射电子显微镜
晶体管
栅氧化层
介电强度
光电子学
栅极电介质
电介质
随时间变化的栅氧化层击穿
泄漏(经济)
渗透(认知心理学)
MOSFET
透射电子显微镜
电气工程
纳米技术
电压
工程类
生物
经济
神经科学
宏观经济学
作者
K. L. Pey,Rakesh Ranjan,Ching‐Hsuan Tung,L.J. Tang,Weiyuan Lin,M. Radhakrishnan
标识
DOI:10.1109/relphy.2004.1315310
摘要
The degradation mechanism of breakdown spots in ultrathin gate dielectrics metal-oxide-semiconductor transistor associated with dielectric-breakdown-induced epitaxy (DBIE) evolution is physically analyzed using high resolution transmission electron microscope (HRTEM). The initial soft breakdown location triggered by percolation path happens randomly along the transistor channel, and then evolves to the formation of DBIE in the vicinity of the percolation path. If the breakdown leakage current is not limited, DBIE will grow and the effective breakdown location will successively shift to either source or drain of the transistor channel. For most of the hard breakdown events studied, DBIE eventually shorts the gate electrode to either source or drain region, leading to a typical one-sided hard breakdown seen electrically, which confirms by HRTEM images.
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