P-채널 strained silicon SOI MOSFET의 아날로그 특성

As the physical size of CMOS device scales down, the decrease of mobility becomes more significant. To increase the mobility many device structures including strained silicon CMOS have been suggested. In this work, the comparative study of the analog characteristics of strained silicon SOI MOSFETs and the general SOI MOSFETs has been performed. Although the hole mobility of strained silicon devices is larger than that of general SOI devices, the analog performance is not improved due to more DIBL effects.