Control of trench sidewall stress in bias ECR-CVD oxide-filled STI for enhanced DRAM data retention time

This is the first detailed study of data retention characteristics of DRAM with bias ECR-CVD oxide-filled shallow trench isolation (STI). It clarifies the relationship between trench sidewall stress and data retention characteristics. Excessive stress on trench sidewalls causes strain and defect-related leakage current, and it degrades data retention time. Strain and defects are introduced by process conditions like deep trenching, high-temperature densification, and vertically etched trenching in bias ECR-CVD oxide-filled trench case. By eliminating the cause of leakage current, fully operating 0.18 /spl mu/m-rule DRAMs have been manufactured.