Multi-Layer Microchannel Cooling for Large-Area High-Power Electronics

With the rapid development of ultra-large chips and increasing power demands—particularly driven by supercomputing chips from companies such as Tesla (Dojo)and Nvidia (Grace Blackwell NVLink72)—the challenge of heat dissipation for large-area, high-performance chips has intensified. Currently, large-area computing chips composed of multiple computational units and chiplets face significant thermal management challenges as chip area and chiplet density increase. An efficient cooling technology is needed to address the heat dissipation problem. This paper proposes a method based on multi-layer microchannel liquid cooling to achieve efficient heat dissipation for large-area, high-power computing chips. The approach leverages a manifold-microchannel configuration, where the manifold layer distributes the coolant, and the microchannel layer provides efficient convective heat transfer for high-power dissipation. Our manifold design not only optimizes the distribution and collection of the fluid but also enhances the overall efficiency of the cooling system. This paper presents simulation results for both thermal and hydraulic performances of the multi-layer microchannel cold plate. The results show that our design achieves stable and uniform fluid supply under a total pressure drop of 12 kPa, with the outlet flow velocity deviation between different microchannels not exceeding 11.1%. The heat dissipation performance improves with increasing flow velocity; at a flow rate of 0.6 m/s and a heat flux density of 120 W/cm², the temperature rise can be controlled below 35 K. Our multi-layer microchannel cold plate can effectively dissipate total power over 6 kW over chip area of 100 cm² under liquid pressure drop of 12 kPa. This technology promises to play a vital role in efficient heat dissipation of future supercomputing chips and large-scale electronic devices.