Implementation of Bi-Layer Lithography on Polymethylmethacrylate Achieving Sub-10 μm Organic Thin Film Transistors

Implementation of CMOS compatible photo-lithography process on pristine poly (methyl methacrylate) (PMMA) gate dielectric, surpassing the existing incompatibility issues, is demonstrated. A novel bi-layer resist approach is introduced to perform lithography directly over PMMA without being subjected to high-temperature process steps, photo-cross-linking, or chemical modification. As a consequence, a two orders of reduction in gate leakage current from ${{10}^{-{7}} \text {A/cm}^{{2}}}$ to ${{10}^{-{9}} \text {A/cm}^{{2}}}$ with no appreciable change in the dielectric constant ensures the adaptability of bi-layer resist method. Bi-layer lithography on PMMA gate dielectric is implemented to achieve solution processed bottom-gate bottom-contact (BGBC) organic thin film transistors (OTFTs) with sub- ${{10} \mu {m}}$ channel length. The array of such OTFTs, showing zero switch-on voltage ( ${V_{{0}}}$ ) consistently along with other figures of merit intact is reported.