信号完整性
电源完整性
信号(编程语言)
降级(电信)
功率(物理)
电子工程
计算机科学
噪音(视频)
印刷电路板
互连
电气工程
工程类
电信
物理
人工智能
图像(数学)
程序设计语言
量子力学
作者
Rajesh Badala Jagadeesh,Venkatesh Ramashastry,Bharath Ramprasad,Surya Prakash Rao Bengaluru Srihari,Satvik Bhat,Vignesh Sunku Radhakrishna
标识
DOI:10.1109/edaps56906.2022.9994903
摘要
The analysis of package design with the PCB interconnects presented here shows the benefit of signal and power integrity co-simulations with power aware approach to mitigate the signal degradation that are caused by non-ideal behavior of the power distribution network and the simultaneous switching I/Os.
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