Percolation theory-based KMC simulation for scaled Fe-FET based multi-bit computing-in-memory with temperature compensation strategy

Abstract In this letter, we investigate the impact of percolation transport mechanisms on ferroelectric field effect transistor (FeFET) multi-value storage with kinetic Monte-Carlo (KMC) simulation considering aspect ratio and temperature dependencies. It is found that the portion of the ferroelectric polarization, which dominates the threshold voltage shift of the FeFET, increases when aspect ratio of device decreases. Moreover, randomness of percolation path formation and variations of equivalent conductance can be suppressed, indicating mitigation of device-to-device variations and enhancement of separation of individual states. Besides, to further investigate an amorphous channel promising in multi-bit applications, disorder effects in channel contribute to intrinsic percolation transport, coupling with multi-domain dynamics in Fe-layer, are studied by the high temperature characterization. On this basis, the KMC scheme is further modified to predict multi-value distribution from 300 K to 400 K. To tackle such critical reliability issues induced inaccuracy for in-memory computing (CIM), an efficient write-verify scheme is proposed to mitigate state overlapping and provide in-depth insights for co-design of device reliability and multi-bit CIM performances.