Design of a High Speed and High Resolution Comparator

With the analysis of preamplifier latch comparator,a high speed and high resolution comparator used for 12 bit and 1 MS/s SAR ADC was designed.The prototype was designed in 0.5 μm CMOS CSMC process.Based on the Hspice simulation tool,a new way to measure the offsets of preamplifier and latch was proposed.With improvements of existing offset calibration method,the offsets of preamplifier and latch are lower than before.The Cadence Spectre simulation results show that its speed can reach 20 MHz and the resolution is 0.8 mV.