Design and Investigation of 7T2M-NVSRAM With Enhanced Stability and Temperature Impact on Store/Restore Energy

This paper proposes a seven-transistor-two-memristor (7T2M) nonvolatile static random access memory (NVSRAM). The designed 7T2M-NVSRAM is resilient to data loss while powered off and renders substantial read/write margins as compared to the conventional SRAM and the previous NVSRAM structures. One memristor is connected to the sources of driver transistors of 6T SRAM, and the motive of this memristor is to enhance the read and write stability. It is ascertained that the read margin is improved by 16%, and the write margin is improved by 30% in regards to the conventional SRAM, whereas another memristor is connected to the data node of the 6T SRAM along with an additional transistor, and this memristor enables the nonvolatile nature. Moreover, a temperature-dependent memristor model is employed to investigate the temperature effects on power dissipation along with storing and restoring energy during power-down and power-up conditions, respectively. The results reveal that the power dissipation rises ten times for the increase of every 100 K temperature, and both storing and restoring energies decrease at higher temperatures. The designed structure strengthens the applicability of SRAM in advance processor used for temperature sensor design and also enables it to be utilized in the persistent memory design.