A 7.2–27.3 GHz CMOS LNA With 3.51 ±0.21 dB Noise Figure Using Multistage Noise Matching Technique

A wideband low-noise amplifier (LNA) with low and flat noise figure (NF) is presented in this article. For conventional wideband noise matching, the noise performance in the high-frequency region of the entire wideband is usually deteriorated due to the frequency-dependent nature of the minimum noise figure (NF _min ) for a MOSFET. To address this issue, a novel wideband noise matching approach aiming at noise matching in high band is proposed. This approach can reduce the NF in high band at the cost of a slight NF increase in low band, eventually achieving a low and flat NF and thus a better overall noise performance for a wideband LNA. In addition, the multistage noise matching technique is employed at high frequencies to further reduce the NF caused by the second amplification stage. To validate the proposed techniques, a two-stage LNA prototype was designed and fabricated using a 65 nm CMOS process. The experimental results indicate a peak gain of 16.6 dB with a −3 dB bandwidth (BW) from 7.2 to 27.3 GHz (a fractional BW of 116%). Within the entire band of interest, the simulated NF is low and almost constant (3.3–3.4 dB), while the measured NF falls within the range of 3.30–3.72 dB. Considering the uncertainty of NF measurement, a 0.21 dB NF flatness is one of the best results among the reported millimeter-wave wideband LNAs. The measured third-order input intercept point (IIP3) is −6 dBm at 20 GHz, while the power consumption is 13.2 mW. In addition, only two passive transformers are used in this design, leading to a compact chip core area (0.14 mm ² ).