Van der Waals Gap Enabled Robust Retention of MoS 2 Floating‐Gate Memory for Logic‐In‐Memory Operations

Abstract Floating gate (FG) memory can store data for decades without a power supply. Herein, high‐performance MoS 2 FG transistors with stable operations are demonstrated, in which a van der Waals (vdW) gap is constructed between tunnelling oxide layer and channel to prevent the leakage. The atomic FG structure is one‐step formed from HfS 2 flake by ozone treatment while the supersaturated oxygen at the interface affords to the vdW gap. The vdW gap MoS 2 FG transistors exhibit stable operations after 21 days, ultralow leakage current (0.1 fA µm −1 ), excellent retention capability >10 5 s, high on/off ratio of 10 7 , and desirable cycling endurance performance (>1000 cycles). Configurable logic‐in‐memory devices are accomplished with multi‐gated structures through multi‐level programming operations, which is modulated by different electrostatic potential on the FG stack. NAND and NOR output logic sequences are generated. The designed FG memory is promising for developing in‐memory computing systems.