Complete design approach of a 3rd order continuous-time sigma-delta ADC with FIR feedback and low-noise low-distortion op-amp achieving 101.8 dB SNDR and −110dB THD

This paper presents a step-by-step design approach of a 3rd order continuous-time sigma-delta modulator with a 4-tap FIR feedback DAC achieving 107 dB DR (A-weighted), −110 dB THD and an SNDR of 101.8 dB. The THD is achieved through a fully differential feed-forward compensated op-amp that maintains high linearity with the aid of a class AB output stage and an optimum bias current through a CMFB loop. The modulator consumes 322.5uW of power while taking an area of 0.2925 mm2.