A Two-Step Resolution-Reconfigurable Time-to-Digital Converter Using SAR ADC

This paper presents a resolution reconfigurable ADC-assisted time-to-digital converter (TDC). The reconfigurable resolution and range are achieved by adjusting reference currents in the time-to-voltage converter (TVC) and the reference voltages in the ADC. The proposed resolution-reconfigurable approach combined with a two-step hierarchical architecture can be employed in a wide range of applications with different spatial range and resolution requirements. A prototype chip is fabricated using AMS 350nm process, with a core area of 0.15mm ² . Measurement results show that the TDC achieves a resolution of 39ps with a 100MHz clock, or 78ps with a 50MHz reference clock. In both cases, the measurement rate is 384kS/s while consuming less than 6.7mW from a 3.3V supply.