NAPA-p1: monolithic nanosecond timing pixel for large area sensors, designed for future e + e - colliders

Abstract NAPA-p1 is a prototype Monolithic Active Pixel Sensor 'MAPS' developed as a first iteration towards meeting the detectors general requirements for future e + e - colliders. Long-term objective is to develop a wafer-scale sensor in MAPS with an area ∼ 10 cm × 10 cm. This article presents the motivations for the design choices of NAPA-p1, translating the physics requirement into circuit specifications. Simulations show a pixel jitter of < 400 ps-rms and an equivalent noise charge of 13 e - rms with an average power consumption of 1.15 mW/cm 2 assuming a 1% duty cycle, meeting the target specifications. The prototype is designed in 65 nm CMOS imaging technology, with dimensions of 1.5 mm × 1.5 mm and a pixel pitch of 25 μm. The prototype chip has been fabricated and characterization results will be available soon.