薄脆饼
堆积
材料科学
模具准备
晶片键合
晶圆回磨
图层(电子)
晶圆级封装
晶片测试
晶圆规模集成
有限元法
过程(计算)
堆栈(抽象数据类型)
机械工程
光电子学
电子工程
工程制图
计算机科学
晶片切割
工程类
复合材料
结构工程
物理
核磁共振
程序设计语言
操作系统
作者
H. Y. Li,Motoharu Kawano,Ji Lin,Hong Ji,Chin Seong Lim
标识
DOI:10.1109/eptc50525.2020.9315154
摘要
This paper describes the demonstration of a 4-layer wafer stack using a combination of face-to-face and back-to-back, wafer-to-wafer hybrid bonding process. Details of process flow, process characterization and challenges in multi-layer wafer stacking are included in this paper. Wafer warpage of different pattern density is simulated with 3D finite element analysis (FEA) model. Wafer bow results match with low warpage results of simulation. 4-layer wafer was stacked together without separation. The process development and improvement carries out.
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