Experimental three-dimensional thermal mapping of a GaN on RF-SOI chip

We present a novel method to determine the three-dimensional (3D) temperature field of a radio frequency (RF) chip based on a 3D heterogeneous integration of GaN HEMT and RF-SOI technologies combining the advantages of both. It is composed of a stack of multiple layers of different materials on top of a SOI substrate. A RF GaN transistor is located at the top of the stack and acts as a heat source. We use several resistance temperature detectors (RTDs) embedded at different key locations in the stack coupled to an infrared (IR) thermography. When combined to a 3D numerical model, such methodology enables us to extract the necessary information in order to retrieve the temperature 3D distribution in the whole sample.