Methodology of virtual testing of trimmable analog circuits

This paper presents a design for test (DFT) methodology focused on high precision analog circuits using trimming methodology. A simulation technique called trimming analysis was derived from the production test process and is used for simulation-based verification of the circuit performances including trimming network and trimming algorithm. The virtual trimming by joint simulation of the test procedure and circuit allows to improve all parts and to maximize yield. The application of the analysis is shown for two different examples.